In recent years, as semiconductor memory devices have a large capacity, semiconductor memory devices have begun to be utilized as secondary memory devices alternative to hard disks. For example, a NAND EEPROM constituted by NAND cells in which memory cells are cascade-connected is suitable for high integration and thus widely used for secondary memory devices and memory cards of mobile terminals such as mobile phones.
In such a semiconductor memory device, TSV (Through-Silicon Via) has been known. According to a TSV structure, a plurality of memory chips are stacked within a package and a through-hole via is provided so as to penetrate from a bottom layer chip to a top layer chip of the stacked memory chips, so that pads of all memory chips are commonly wired. Alternatively, there is a structure that a wiring is provided in a sidewall from the bottom layer chip to the top layer chip of the stacked memory chips, so that pads of all memory chips are commonly wired.
In a stacked multi-chip package, a plurality of stacked chips need to have specific chip addresses so that the respective chips are distinguished from each other and operated individually. When the chips are connected to each other by bonding, pads for chip address are provided on the respective chips and different leads are bonded to pads for identifying a chip address on the chips, so that these chips can be distinguished from each other.
Because pads at the same position are commonly connected in the TSV structure and the structure that a common wiring is provided in side surfaces of chips, chips cannot be distinguished from each other by bonding. In this respect, there is an idea that a chip address is stored in advance in a memory of each chip before the chip is stacked. However, stacking a plurality of chips in view of chip addresses is inefficient and the chips need to be sorted at the time of assembling, and there is a problem of cost increase.